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 GENERAL PURPOSE PHEMT * FEATURES 19 dBm Linear Output Power at 12 GHz 12 dB Power Gain at 12 GHz 17 dB Maximum Stable Gain at 12 GHz 11 dB Maximum Stable Gain at 18 GHz 45% Power-Added Efficiency
DRAIN BOND PAD (2X) SOURCE BOND PAD (2x)
FPD7612
GATE BOND PAD (2X)
*
DESCRIPTION AND APPLICATIONS
DIE SIZE (m): 520 x 400 DIE THICKNESS: 75 m BONDING PADS (m): >48 x 48
The FPD7612 is an AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (PHEMT), featuring a 0.25 m by 200 m Schottky barrier gate, defined by high-resolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance. The epitaxial structure and processing have been optimized for reliable mediumpower applications. The FPD7612 also features Si3N4 passivation and is available in a low cost plastic package. Typical applications include commercial and other narrowband and broadband high-performance amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output amplifiers, and medium-haul digital radio transmitters. * ELECTRICAL SPECIFICATIONS AT 22C
Parameter Power at 1dB Gain Compression Power Gain at P1dB Power-Added Efficiency Maximum Stable Gain (S21/S12) f = 12 GHz f = 24 GHz Saturated Drain-Source Current Maximum Drain-Source Current Transconductance Gate-Source Leakage Current Pinch-Off Voltage Gate-Source Breakdown Voltage Gate-Drain Breakdown Voltage Thermal Resistivity (see Notes) IDSS IMAX GM IGSO |VP| |VBDGS| |VBDGD| JC VDS = 1.3 V; VGS = 0 V VDS = 1.3 V; VGS +1 V VDS = 1.3 V; VGS = 0 V VGS = -5 V VDS = 1.3 V; IDS = 0.2 mA IGS = 0.2 mA IGD = 0.2 mA VDS > 3V 0.7 12.0 14.5 Symbol P1dB G1dB PAE SSG VDS = 5 V; IDS = 50% IDSS 16 9.5 45 17 11 60 120 80 1 1.0 14.0 16.0 280 10 1.3 75 mA mA mS A V V V C/W dB Test Conditions VDS = 5 V; IDS = 50% IDSS VDS = 5 V; IDS = 50% IDSS VDS = 5V; IDS = 50% IDSS; POUT = P1dB Min 18 10.5 Typ 19 12.0 45 Max Units dBm dB % RF SPECIFICATIONS MEASURED AT f = 12 GHz USING CW SIGNAL
Phone: +1 408 850-5790 Fax: +1 408 850-5766
http://www.filtronic.co.uk/semis
Revised: 11/17/04 Email: sales@filcsi.com
GENERAL PURPOSE PHEMT * ABSOLUTE MAXIMUM RATINGS1
Parameter Drain-Source Voltage Gate-Source Voltage Drain-Source Current Gate Current RF Input Power
2
FPD7612
Max 8 -3 IDSS 10 100 175 Units V V mA mA mW C C W dB %
Symbol VDS VGS IDS IG PIN TCH TSTG PTOT Comp.
3 2
Test Conditions -3V < VGS < +0V 0V < VDS < +8V For VDS > 2V Forward or reverse current Under any acceptable bias state Under any acceptable bias state Non-Operating Storage See De-Rating Note below Under any bias conditions 2 or more Max. Limits
Min
Channel Operating Temperature Storage Temperature Total Power Dissipation Gain Compression Simultaneous Combination of Limits
1
3
-40
150 0.5 5 80
TAmbient = 22C unless otherwise noted
Max. RF Input Limit must be further limited if input VSWR > 2.5:1
Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes: * Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device. * Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib. * Power Dissipation defined as: PTOT (PDC + PIN) - POUT, where PDC: DC Bias Power PIN: RF Input Power POUT: RF Output Power * Absolute Maximum Power Dissipation to be de-rated as follows above 22C: PTOT= 500mW - (3.6mW/C) x THS where THS = heatsink or ambient temperature. Example: For a 85C heatsink temperature: PTOT = 0.5W - (0.0036 x (85 - 22)) = 0.27W
*
HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A per ESD-STM5.1-1998, Human Body Model. Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263. ASSEMBLY INSTRUCTIONS The recommended die attach is gold/tin eutectic solder under a nitrogen atmosphere. Stage temperature should be 280-290C; maximum time at temperature is one minute. The recommended wire bond method is thermo-compression wedge bonding with 0.7 or 1.0 mil (0.018 or 0.025 mm) gold wire. Stage temperature should be 250-260C. APPLICATIONS NOTES & DESIGN DATA Applications Notes are available from your local Filtronic Sales Representative or directly from the factory. Complete design data, including S-parameters, noise data, and large-signal models are available on the Filtronic web site.
All information and specifications are subject to change without notice.
*
*
Phone: +1 408 850-5790 Fax: +1 408 850-5766
http://www.filtronic.co.uk/semis
Revised: 11/17/04 Email: sales@filcsi.com


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